1. Field of the Invention
The present invention relates to a liquid crystal display, and more particularly to a thin film transistor substrate, which has increased aperture ratio, prevents shorts between pixel electrodes and/or reduces the number of holes for contacting the pixel electrodes, and a method of manufacturing the thin film transistor substrate.
2. Description of the Related Art
Generally, a liquid crystal display (LCD) displays a picture by controlling light transmissivity using an electric field. To this end, the LCD includes a liquid crystal panel having liquid crystal cells arranged in a matrix, and a driving circuit for driving the liquid crystal panel. The liquid crystal panel is provided with pixel electrodes for applying an electric field to each liquid crystal cell with respect to a reference electrode, that is, a common electrode. Typically, the pixel electrodes are provided on a lower substrate for each liquid crystal cell, whereas the common electrode is integrally formed on the entire surface of an upper, opposing substrate. Each of the pixel electrodes is connected to a thin film transistor (TFT) used as a switching device. The pixel electrode drives the liquid crystal cell in accordance with a data signal applied via the TFT.
FIG. 1 shows an electrode arrangement of a thin film transistor substrate of a conventional liquid crystal display. In FIG. 1, the LCD includes thin film transistors 8 positioned at the intersections between data lines 4 and gate lines 2, and pixel electrodes 6 connected to drain electrodes 14 of the thin film transistors 8. Each of the thin film transistors 8 includes a gate electrode 10 protruding from the gate line 2, a source electrode 12 protruding from the data line 4, and the drain electrode 14 connected to the pixel electrode 6 via a first contact hole 20. Further, each thin film transistor 8 includes a gate-insulating film (not shown) insulating the gate electrode 10 from a semiconductor layer (not shown), which defines a conductive channel between the source electrode 12 and the drain electrode 14 when a large enough gate voltage is applied to the gate electrode 10. The thin film transistor 8 responds to a gate signal from the gate line 2 to selectively apply a data signal from the data line 2 to the pixel electrode 6.
The pixel electrode 6 is located at a cell area defined by the data line 4 and the gate line 2 and is made from an ITO (indium tin oxide) with a high light transmissivity. The pixel electrode 6 is formed on a protective film (not shown) coated on the entire surface of the thin film transistor 8, and is electrically connected, via the first contact hole 20 formed in the protective film, to the drain electrode 14. The pixel electrode 6 generates a potential difference with respect to a common transparent electrode (not shown) provided at an upper substrate, opposing the thin film transistor substrate, in response to a data signal applied via the thin film transistor 8. By this potential difference, liquid crystal positioned between the thin film transistor substrate and the upper substrate is rotated to allow light, from a light source, to pass therethrough.
As further shown in FIG. 1, storage capacitor 18 and the prior or pre-stage gate line 2 are overlapped by a portion of the pixel electrode 6. The storage capacitor 18 prevents a voltage variation in the pixel electrode 6 by charging to a voltage when a gate high voltage is applied to the pre-stage gate line 2 and discharging the charge voltage when a data signal is applied to the pixel electrode 6. The storage capacitor 18 must have a large capacitance value so as to maintain a stable pixel voltage. To this end, the storage capacitor 18 is formed by the pre-stage gate line 2, an overlapping storage electrode 16, and the gate insulating film (not shown) disposed therebetween. The storage electrode 16 is electrically connected, via a second contact hole 22 formed in the protective film (not shown), to the pixel electrode 6. The storage electrode 16 is provided on the gate insulating film at the time of forming the data line 4 and the source and drain electrodes 12 and 14.
As described above, in the conventional thin film transistor substrate, the overlapping portion of the pixel electrode 6 and the pre-stage gate line 2 must be as large as possible so as to provide a storage capacitor with a large capacitance value. As a result, the distance between the pixels 6 adjacent to each other at the upper and lower portions thereof is reduced, and a short may be generated between them.
Also, inorganic film with a large dielectric constant, such as SiNx, and SiOx, is usually used for the protective film of the thin film transistor substrate. This inorganic protective film typically maintains a constant horizontal interval (e.g., 3 to 5 μm) between the pixel electrode 6 and the data line 4 to minimize a coupling effect caused by a parasitic capacitor Cds.
However, during processing, particularly the several light-exposing steps, miss alignment errors can occur between electrodes formed from different layers. As a result, a constant interval may not be maintained between the data line 4 and the pixel electrode 6, and a capacitance of the parasitic capacitor Cds between the data line 4 and the pixel electrode 6 becomes non-uniform. A data signal, applied to the data line 4 and then to the pixel electrode 6 is deteriorated due to the coupling effect caused by this non-uniform parasitic capacitor Cds, and picture quality thus deteriorates.
Furthermore, in the conventional LCD, an aperture ratio is reduced by as much as the drain electrode 14 of the thin film transistor 8 overlaps the pixel electrode 6 for formation of the contact hole 20.